Senior IC Digital Verification Engineer Prague/Brno
The company
EM Microelectronic is one of the most innovative IC providers. It developed and manufactured the smallest and the lowest power consuming Bluetooth chip on the market, the top performing optical sensors for optical office as well as gaming mice and it was the first to release the award-winning world-first dual-frequency NFC + RAIN RFID em|echo.
You will have the opportunity to be part of digital/mixed-signal design verification team and to work on the true ultra-low power designs verification.
Job description
Are you experienced verification engineer with ambition to participate on development of state-of-the-art designs? Are you ready for challenges of ultra-low power, low voltage integrated circuits for battery-operated and field-powered applications?
If so, our company would like to offer you the opportunity to be part of our digital and mixed-signal design verification team.
We are looking for a Senior Verification Engineer to our System On Chip Wireless team. You would participate on digital verification of our new best in class Bluetoothe Low Energy Chip.
Profile
As part of our digital/mixed-signal design verification team you would be responsible for:
- creation of verification plan and list of verification requirements
- perform verification state-of-the-art ultra-low power digital design using UVM methodology in SystemVerilog
- cooperation with analog design team to define interfaces and timing requirements
- development of behavioral models
- development of IP based UVM testbench Framework
- lead and mentor a team of young verification engineers
- drive improvements in company verification methodologies and environment
- cooperate with other company sites in US and Switzerland to improve synergy on methodology and share best verification practices
- generate the industrial test patterns
Professional requirements
We have following requirements for this position:
- At least 3 years experience with digital verification methodologies of integrated circuits
- Underestanding of digital verification methodologies of integrated circuits and UVM
- System Verilog language
- Experience with Object Oriented Programming
- Experience with building testbenches based on UVM methodology System Verilog (class approach)
- Knowledge of all digital verification steps (RTL, gate level)
- Written and fluent English
- Visa and residence permit in the Czech Republic for the purpose of employment
- Autonomy in his field and capability to work in multinational team
Education
Master's Degree in Electrical Engineering or Computer Science is the minimum education
Having following knowledge and experience would be a plus:
- Knowledge of VHDL language
- Understanding of wireless systems and communication protocols (HF, UHF,
- Bluetooth) would be benefitting
- Experience with TCL or Perl scripting
- Experience with Cadence verification tools
- Simulation with UPF for power aware verification
- Knowledge of Formal verification
Languages
English is necessary
Contact
hr@asicentrum.cz
barbora.diblikova@asicentrum.com